Theses and Dissertations Collection

The ever-growing development in high-speed digital systems in speed and complexity is greatly facilitated by creating macromodel for representing electronic packages. Signal Integrity (SI) engineers extensively use macromodel of digital systems in electronic circuit simulators to verify the validity and integrity of different circuits and their behavior upon simulation. When creating the macromodels for future simulation and design, verifying the stability, passivity, and causality of the data is a very important task. In this thesis, we primarily focus our discussion on causality of the system.

Causality verification of linear interconnect system in high-speed digital systems is of paramount importance. A real physical system is always causal, but the measured S-parameter of such systems may contain causality violations. Different techniques of causality detection have been introduced in literature over time. We have analyzed some of these techniques and focus on their merits and demerits. A new method for checking causality is also introduced along with the challenges of implementing this technique from a practical perspective.

Analysis of proposed techniques and conclusions brought about on these are supported by appropriate numerical examples. We performed tests on both artificial systems and actual physical system models for verification. Additionally, we demonstrated tests in both time domain and frequency domain for verification and enforcement of causality.